1. Field of the Invention
The invention pertains to air traffic control (ATC) transponders, particularly with respect to the pulse spacing decoder thereof.
2. Description of the Prior Art
A system of air traffic control (ATC) has long been in existence for interrogating aircraft from ground stations via airborne ATC transponders for obtaining aircraft data from the transponder in response to the interrogation as well as for utilizing the transponder transmissions themselves to derive aircraft location data. In order to interrogate a transponder the ground station transmits a pulse pair with a spacing therebetween representative of a mode in which the airborne transponder is to respond. For example, a particular transmitted pulse spacing code triggers a transponder A-mode response in which the transponder transmits data regarding the aircraft type. A different pulse spacing may trigger a C-mode response in which the transponder transmits data regarding the aircraft altitude. A still further pulse spacing may trigger an SLS mode (side lobe suppression) for suppressing transponder transmission when the aircraft is receiving from a side lobe of the ground station antenna in a manner and for reasons well understood in the ATC art. Aviation regulatory agency specifications prescribe the various transponder modes as well as the specific pulse code spacings therefor. The agency specifications additionally prescribe permitted pulse spacing tolerances or timing "windows" for receipt of the pulses spaced apart in accordance with the various ATC commands.
The ATC airborne transducer includes a pulse spacing decoder to provide a mode decision output in accordance with the spacing between the received pulses. Generally the ATC decoder utilizes the delayed pulse coincidence technique wherein the first pulse is delayed and the delayed pulse utilized to detect coincidence with respect to the second received pulse thereby determining the pulse spacing in accordance with the imparted delay. Early transponder decoders utilized lumped constant delay lines along which the first pulse was transmitted with pulse coincidence circuits connected to appropriate taps along the line for detecting coincidence between the arrival of the second pulse and the position of the delayed pulse in the line. Lumped constant delay lines are physically large and relatively expensive. They are no longer utilized in present day transponder decoders.
In present day transponder decoders asynchronous digital delay line shift registers have replaced the lumped constant delay lines. The asynchronous digital delay line is a continuously clocked shift register with coincidence devices connected to appropriate stages of the register to provide the pulse coincidence decoding described above. The first received pulse of the coded pulse pair is entered into the line when received and clocked down the shift register by the continuously running clock to generate coincidence detection windows via window generation circuits connected to the appropriate stages of the register. Coincidence between the generated windows and the second received pulse provides the mode selection decision signals.
This prior art transponder decoder arrangement has the disadvantage that for reasonably low frequency clock signals and for shift registers of reasonable length excessive uncertainty errors are introduced into the window generation timing whereby the pulse space timing tolerances of the avionic regulatory agencies may be exceeded. This occurs because the windows are generated in synchronism with the clock pulses but the first received pulse that triggers the window generation is received at a time that is random with respect to the occurrences of the clock pulses. The data pulse may be received either in coincidence with the occurrence of a clock pulse or at any time in the interval between clock pulses. Thus although the coded spacing between the received data pulses is precisely defined, a timing uncertainty in the window generation of one clock interval is introduced into the decoder operation. In order to minimize the timing uncertainty a high frequency clock is necessitated. Thus, in order to accommodate the relatively long time intervals between the received data pulses, an exceedingly long shift register is required. Generally in practical present day transponder decoders a compromise is effected between register length and uncertainty error thus compromising system performance accuracy.